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 FAN2560 -- 350mA Low-VIN LDO with Fast Transient Response
August 2009
FAN2560 350mA Low-VIN LDO with Fast Transient Response
Features
55A Typical Quiescent Current Up to 350mA Output Current 2.9V to 5.5V Bias Supply Voltage VOUT+0.1V to 5.5V Power Input Supply Voltage Fixed Voltage Options: 1.3V and 1.5V Thermal Shutdown Protection (TSD) Input Under-Voltage Lockout (UVLO) Short-Circuit Current Protection (SCP) 5-bump 0.96 x 1.33mm WLCSP
Description
The FAN2560 is a linear low-dropout (LDO) regulator with a split-supply architecture. Separate bias and supply inputs allow bias to be taken directly from the battery, while the input is taken from a lower preregulated source. This allows a smaller differential voltage between input and output, which provides greater efficiency over a wider VBAT range. The FAN2560 is available in a fixed-voltage output, 5-bump, WLCSP package.
Applications
Moderate Current Digital Loads DVB-H, DMB Processors Handsets, Smart Phones WLAN DC-DC Converter Modules PDA, DSC, PMP, and MP3 Players Portable Hard Disk Drives
Typical Applications
2.9 to 5.5V VOUT +0.3V
CIN VBAT VIN VOUT
VBAT
2.9 to 5.5V
VIN VOUT GND
1F
FAN2560
GND
CIN
COUT
1F
FAN2560
2.2 F
COUT
2.2F
EN
EN
Figure 1. Separate Supply and Bias Line
Figure 2. Connected Supply and Bias Line
Ordering Information
Part Number
FAN2560UC13X FAN2560UC15X
Operating Temperature Range
-40C to 85C -40C to 85C
Package
WLCSP-5 0.96 x 1.33mm WLCSP-5 0.96 x 1.33mm
Eco Status
Green Green
Packing Method
Tape and Reel Tape and Reel
For Fairchild's definition of Eco Status, please visit: http://www.fairchildsemi.com/company/green/rohs_green.html.
(c) 2006 Fairchild Semiconductor Corporation FAN2560 * Rev. 1.0.1 www.fairchildsemi.com
FAN2560 -- 350mA Low-VIN LDO with Fast Transient Response
Block Diagram
Figure 3. IC Block Diagram
Pin Configuration
VIN A1 GND VBAT C1
B2 C3 EN A3 VOUT
VOUT A3
B2
A1 VIN
GND
C1 VBAT
EN C3
TOP VIEW
BOTTOM VIEW
Figure 4. 0.96 x 1.33mm WLCSP package
Pin Definitions
Pin #
A1 A3 C1 C3 B2
Name
VIN VOUT VBAT EN GND
Description
Power supply input. A minimum 1F MLCC is required to GND. Output Voltage. A typical COUT=1F to 2.2F MLCC is required to GND, placed close to the VOUT terminal. Battery bias supply input. No capacitor is required unless another bulk capacitor is more than few inches away. Enable input. The device is in shutdown mode when the voltage at this pin is <0.4V and enabled when >1.1V. The EN latches the LOW logic state once externally forced. Do not leave this pin floating when the device is turned ON. Ground pin. Connect to a PCB GND plane.
(c) 2006 Fairchild Semiconductor Corporation FAN2560 * Rev. 1.0.1
www.fairchildsemi.com 2
FAN2560 -- 350mA Low-VIN LDO with Fast Transient Response
Absolute Maximum Ratings
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The absolute maximum ratings are stress ratings only.
Symbol
VBAT, VIN, EN VOUT TJ TSTG TL ESD Output Voltage Junction Temperature Storage Temperature
Parameter
Min.
-0.3 -0.3 -40 -65
Max.
6.0 VIN + 0.3V +150 +150 +260
Units
V V C C C kV
Lead Soldering Temperature, 10 Seconds Electrostatic Discharge Protection Level Human Body Model per JESD22-A114 Charged Device Model per JESD22-C101 3.5
1.5
Recommended Operating Conditions
The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not recommend exceeding them or designing to absolute maximum ratings.
Symbol
VBAT VIN IOUT CIN COUT TA TJ
Parameter
Bias Supply Range, (VOUT + 1.4V) < VBAT Power Supply Range, (VIN < VBAT) Output Current Input Capacitor (Effective Capacitance) Equivalent Series Resistance (ESR) Output Capacitor (Effective Capacitance) Equivalent Series Resistance (ESR) Operating Ambient Temperature Range Operating Junction Temperature Range
Min.
2.9 VOUT + VDO 0 0.7 0 0.7 3 -40 -40
Typ.
Max.
5.5 VBAT 350
Units
V V mA F m F m C C
1.0 300 2.2 12.0 300 +85 +125
Thermal Properties
Symbol
JA
Parameter
Junction-to-Ambient Thermal Resistance
Min.
Typ.
180
(1)
Max.
Units
C/W
Note: 1 Junction-to-ambient thermal resistance is a function of application and board layout. This data is measured with four-layer boards in accordance to JESD51- JEDEC standard. Special attention must be paid not to exceed junction temperature TJ(max) at a given ambient temperature TA.
(c) 2006 Fairchild Semiconductor Corporation FAN2560 * Rev. 1.0.1
www.fairchildsemi.com 3
FAN2560 -- 350mA Low-VIN LDO with Fast Transient Response
Electrical Characteristics
VBAT=2.9V to 5.5V, VIN=VOUT + 0.3V, TA=-40C to +85C, Test Circuit Figure 1, unless otherwise noted. Typical values are at TA=25C, VBAT=3.6V, ILOAD=1mA, VEN=1.8V.
Symbol
Power Supplies VBAT VIN IBAT IIN IVBATSD IVINSD VUVLO V(EN) I(EN) Regulation IOUT VDO VOUT VOUTline VOUTload ISCP
Parameter
Battery Input Supply Input Voltage Range VBAT Supply Current VIN Supply Current VBAT Shutdown Supply Current VIN shutdown Supply Current Under-voltage Lockout Threshold Enable High-level Input Voltage Enable Low-level Input Voltage Enable Input Leakage Current Maximum Output Current Dropout Voltage with Respect to Output Voltage Accuracy Line Regulation Load Regulation Short-circuit Current Limit
(2) VIN
Conditions
(VOUT + 1.4V) < VBAT VIN < VBAT ILOAD=0A ILOAD=0A VBAT=3.6V, EN=GND VBAT=3.6V, EN=GND VBAT Falling Edge Hysteresis
Min.
2.9 VOUT + VDO
Typ.
Max.
5.5 VBAT
Units
V V A A A A V V
55 4 0.01 0.01 2.0 0.05 1.1
70 11 1.00 1.00 2.4
0.4 EN=VIN or GND 350 ILOAD=350mA Over Full VIN, IOUT, and Temperature Range Over Full VIN, VBAT, IOUT Range VBAT and VIN applied, EN from L to H, no load, TA= -30C to +85C Hysteresis VIN, 10Hz to 10kHz VBAT, 10Hz to 10kHz 10Hz to 100kHz 3V 60 > 50 60 -2 <6 400 130 300 70 200 2 0 0.5
V A mA mV % mV mA
ISU
Start-up Peak Current
mA 500 C C dB VRMS
TSD PSRR en Peak VOUTline Peak VOUTload tON
Thermal Shutdown Power Supply Rejection Ratio Output Noise Voltage
Rising Temperature
Timing Characteristics Line Transient Response Load Transient Response Turn-on Time 600mV, tRISE=tFALL=10s 0 to 300mA, tRISE=tFALL=1s 2 15 70 200 mV mV s
Note: 2 Dropout voltage is the minimum input to output differential voltage needed to maintain VOUT in regulation, in specified conditions
(c) 2006 Fairchild Semiconductor Corporation FAN2560 * Rev. 1.0.1
www.fairchildsemi.com 4
FAN2560 -- 350mA Low-VIN LDO with Fast Transient Response
Typical Characteristics
Unless otherwise specified, CIN=1F ceramic, COUT=2.2F ceramic, VIN=VOUTnom + 0.3V, VBAT=3.6V, TA=25C, VEN=1.8V.
100 Dro p o u t V IN (m V )
Battery Current (A) 59.0 No Load
80 60 40 20 0 0 50 100 150 200
85C 25C
58.0 57.0 56.0 55.0 54.0 53.0 52.0 51.0
85C 25C
-40C
-40C 2.5 3 3.5 4 4.5 5 5.5
250
300
350
400
Load Current (mA)
Battery Voltage (V)
Figure 5. Dropout Voltage vs. Load Current
110 100 85C 90
6
Figure 6. Battery Quiescent Supply Current
5
IGND(A)
25C 80 70 60 50 0 50 100 150 200 250 300 350 -40C
IBAT+IIN (nA)
4
3
2
1
0 2 2.5 3 3.5 4 4.5 5 5.5
Iload (mA)
VBAT=VIN(V), VEN=0V
Figure 7. GND Current vs. Load Current
425 420 415 410 405 400 395 390 385 380 2.5
Figure 8. Off Mode Current
V IN Current (A)
7.0 6.0 5.0 4.0 3.0 2.0 1.0 0.0 1.6 2.1 2.6 3.1 3.6 4.1 4.6 No load
S h o rt-C i rc u i t C u rre n t (m A )
8.0 85C 25C
25C
-40C
85C
-40C 5.1
3
3.5
4
4.5
5
5.5
VIN Voltage(V)
Figure 9. Input VIN Quiescent Current (VBAT=5.5V)
Battery Voltage (V)
Figure 10. Output Short-Circuit Current
(c) 2006 Fairchild Semiconductor Corporation FAN2560 * Rev. 1.0.1
www.fairchildsemi.com 5
FAN2560 -- 350mA Low-VIN LDO with Fast Transient Response
Typical Characteristics (Continued)
Figure 11. Load Transient Response (5s/div.)
Figure 12. Load Transient Response (5s/div.)
Figure 13. Line Transient Response (50s/div.)
Figure 14. Line Transient Response (50s/div.)
Figure 15. Start-up and Inrush Current (20s/div.)
Figure 16. Start-up and Inrush Current (20s/div.)
(c) 2006 Fairchild Semiconductor Corporation FAN2560 * Rev. 1.0.1
www.fairchildsemi.com 6
FAN2560 -- 350mA Low-VIN LDO with Fast Transient Response
Typical Characteristics (Continued)
Figure 17. PSRR VIN, 10Hz to 10kHz, 1mA
Figure 18. PSRR VIN, 10kHz to 10MHz, 1mA
Figure 19. PSRR VBAT, 10Hz to 10kHz, 1mA
1600 1400 1200
Figure 20. Noise Spectral Power Density, 100mA
1400 1200 1000
VOUT (mV)
VOUT (mV)
1000 800 600 400 200 0 0 200 3.6VBAT 2.9VBAT 5.5VBAT
800 600 3.6VBAT 400 200 0 0 100 200 300 400 500 600 700 800 2.9VBAT 5.5VBAT
Iload (mA)
400
600
800
Iload (mA)
Figure 21. Output Current Voltage Characteristic, 1.5V Option
Figure 22. Output Current Voltage Characteristic, 1.3V Option
(c) 2006 Fairchild Semiconductor Corporation FAN2560 * Rev. 1.0.1
www.fairchildsemi.com 7
FAN2560 -- 350mA Low-VIN LDO with Fast Transient Response
Application Information
ENABLE Latch
A pull-down resistor latches the LOW state of the EN input after this input is externally forced LOW. A lowside switch turns ON a 370 k pull-down resistance to keep the EN in LOW state, even if the EN input is subsequently left floating.
TJ(max) - TA PD(max) = JA
(1)
Soft-Start
A soft-start function prevents an excessive input current flow during start-up. When the LDO is enabled, the softstart circuit limits the peak inrush current below the specified maximum value, which increases when COUT increases. To further reduce the peak inrush current, the output capacitance may be lowered to 1F, taking advantage of FAN2560 stability over a wide range of COUT capacitance.
where TJ(max) is the maximum allowable junction temperature of the die, which is 125C, and TA is the ambient operating temperature. JA is dependent on the surrounding PCB layout and can be improved by providing a heat sink of surrounding copper ground. The addition of backside copper with through-holes, stiffeners, and other enhancements can also aid in reducing JA. The heat contributed by the dissipation of other devices located nearby must be included in design considerations.
Reverse Current Path
During normal operation, VIN is higher than VOUT and the parasitic diode for the series power FET is reverse biased. If the output voltage is externally forced above the input voltage, the parasitic diode gets forward biased and starts to conduct. In this case, it is necessary to limit the reverse current to maximum 100mA to avoid adversely affecting reliability.
Short-Circuit and Thermal Protection
The FAN2560 output current voltage characteristic has a fold-back shape that indicates a short-circuit current limit lower than the maximum load current. Although the short-circuit current is limited to below 500mA, the device can supply high peak output currents of up to 1A for brief periods. However, this output overload may cause the die temperature to increase and exceed maximum ratings due to power dissipation. In such cases, depending upon the ambient temperature, VIN, load current, and the junction-to-air thermal resistance (JA) of the die, the device may enter thermal shutdown. During output overload conditions, when the die temperature exceeds the shutdown limit temperature of 150C, the onboard thermal protection disables the output until the temperature drops below this limit, at which point the output is re-enabled.
Capacitors Selection
The FAN2560 is stable with a wide range of ceramic output capacitors. An output capacitor of at least 0.7F effective capacitance and the minimum ESR over the frequency range of 3 to 300m is required to ensure stability over the full range of supply voltages and load currents. High-ESR tantalum or electrolytic capacitors may be used, but a low ESR ceramic capacitor has to be connected in parallel at the output, at a distance no more than 1-inch from the VOUT pin. The MLCC capacitors indicated in Table 1 have been successfully tested with the FAN2560.
Thermal Considerations
For best performance, the die temperature and the power dissipated should be kept at moderate values. The maximum power dissipated can be evaluated based on the following relationship:
Table 1. Recommended Capacitors
Capacitance
1F 2.2F 2.2F
Size
0603 0603 0402
Vendor
MURATA MURATA MURATA
Part number
GRM188R71C105KA120 GRM188R61A225KF340 GRM155R60J225ME15
(c) 2006 Fairchild Semiconductor Corporation FAN2560 * Rev. 1.0.1
www.fairchildsemi.com 8
FAN2560 -- 350mA Low-VIN LDO with Fast Transient Response
Application Example: Post Regulator for a Switching Converter
The FAN2560 is an ideal choice for battery-powered equipment. The low quiescent bias current can be supplied directly from the battery, while the input voltage can come from a high-efficiency buck regulator, like FAN5350. This combination provides both best efficiency and low noise output. As can be seen in the scope pictures below the schematic, the already-low output voltage ripple, inherent to a switching regulator, is significantly attenuated by the FAN2560 at any frequency within the switching operating range.
Figure 23. Post Regulator for a Switching Converter
Figure 24. PFM Mode (100mA Load) Buck Ripple Rejection, Horizontal Scale: 500ns/div.
Figure 25. PWM, 3MHz (300mA Load) Buck Ripple Rejection, Horizontal Scale: 200ns/div.
(c) 2006 Fairchild Semiconductor Corporation FAN2560 * Rev. 1.0.1
VBAT
www.fairchildsemi.com 9
FAN2560 -- 350mA Low-VIN LDO with Fast Transient Response
Physical Dimensions
BALL A1 INDEX AREA 0.03 C
F
E
A B
(O0.25) Cu PAD A1
F
(0.50) (0.866)
2X
D
(0.433)
0.03 C
(O0.35) SOLDER MASK OPENING
TOP VIEW
0.05 C
2X
0.06 C 0.625 MAX
RECOMMENDED LAND PATTERN (NSMD)
0.3320.018 0.2500.025
E
D
C
SEATING PLANE
SIDE VIEWS
(X)+/-.018
0.50 0.50
F
0.005
CAB
5 X O0.315 +/- .025
C
0.433
B A 123
F
(Y)+/-.018
BOTTOM VIEW
A. NO JEDEC REGISTRATION APPLIES B. DIMENSIONS ARE IN MILLIMETERS. C. DIMENSIONS AND TOLERANCES PER ASME Y14.5M, 1994 D DATUM C, THE SEATING PLANE, IS DEFINED BY THE SPHERICAL CROWNS OF THE BALLS. E PACKAGE TYPICAL HEIGHT IS 582 MICRONS +/- 43 MICRONS (539-625 MICRONS) F FOR DIMENSIONS D, E, X, AND Y SEE PRODUCT DATASHEET. G. BALL COMPOSITION: Sn95.5Ag3.9Cu0.6 SAC405 ALLOY H. DRAWING FILENAME: MKT-UC005AArev5
Figure 26. Wafer-Level Chip-Scale Packaging (WLCSP)
Product Specific Dimensions
Product
FAN2560UC13X FAN2560UC15X
D
1.330 +/- 0.030 1.330 +/- 0.030
E
0.960 +/- 0.030 0.960 +/- 0.030
X
0.230 0.230
Y
0.232 0.232
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild's worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductor's online packaging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/.
(c) 2006 Fairchild Semiconductor Corporation FAN2560 * Rev. 1.0.1
www.fairchildsemi.com 10
FAN2560 -- 350mA Low-VIN LDO with Fast Transient Response
(c) 2006 Fairchild Semiconductor Corporation FAN2560 * Rev. 1.0.1
www.fairchildsemi.com 11


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